Seed Stage · 2026

Silicon,
Unconstrained.

Bypassing the abstraction tax in semiconductor design.

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Every layer costs you silicon.

Every layer of abstraction in chip design adds inefficiency. We don't optimize the netlist. We optimize the physics.

Traditional EDA
Specification
Software / RTL
Logic Gates
Netlists
Layouts
Physics
vs
Driffusion
Specification
Physics

Generative design meets device physics.

Throughput
16K
physics simulations per hour. Each one a complete drift-diffusion solve.
Iteration
1.8s
per simulation. Fast enough to close the loop with reinforcement learning.
Dynamic Range
105×
current variation across parameter sweeps. Real device-level resolution.
MB

Built on Neuromorphic Research

Founded by an ETH Zurich Master's researcher in Neural Systems and Computation, with a background in Electrical Engineering and Neuromorphic Engineering. Bridging the gap between deep learning and silicon physics.

ETH Zurich Neural Systems Neuromorphic Engineering Electrical Engineering